1. Field of the Invention
The present invention relates to the fabrication of integrated circuits, and, more particularly, to an etch stop layer in MOS (metal oxide semiconductor) device processing.
2. Description of the Related Art
The formation of via contacts between two conductors in MOS processing by etching requires an increased amount of area than the contact itself. This is due to nature of the etching process, and becomes ever more critical as scaling of ICs enter the sub-micrometer domain. Accordingly, process engineers continue to develop new processes in an attempt to reduce the amount of area required for making contacts.
One problem for which a solution has long been sought is the tendency of gouging an oxide lying under a metal as the contact is misaligned with the underlying metal layer.
Problems in the past when making a contact to a first level interconnect have necessitated the formation of a "dogbone"-shaped contact where the contact is to be made to the interconnect, so that a misaligned contact would not short to the underlying structures. This is especially a problem where the depths of the oxide to be etched are variable. For example, in a field effect transistor (FET), a contact to a first level interconnect over field oxide is different than a contact to a first level interconnect over a source or drain region.